MindMap Gallery Chapter 2 Data Representation and Operation
This is a mind map about the representation and operation of data in Chapter 2, including number system and coding, operation methods and operation circuits, representation and operation of floating point numbers, etc.
Edited at 2024-01-16 15:53:26El cáncer de pulmón es un tumor maligno que se origina en la mucosa bronquial o las glándulas de los pulmones. Es uno de los tumores malignos con mayor morbilidad y mortalidad y mayor amenaza para la salud y la vida humana.
La diabetes es una enfermedad crónica con hiperglucemia como signo principal. Es causada principalmente por una disminución en la secreción de insulina causada por una disfunción de las células de los islotes pancreáticos, o porque el cuerpo es insensible a la acción de la insulina (es decir, resistencia a la insulina), o ambas cosas. la glucosa en la sangre es ineficaz para ser utilizada y almacenada.
El sistema digestivo es uno de los nueve sistemas principales del cuerpo humano y es el principal responsable de la ingesta, digestión, absorción y excreción de los alimentos. Consta de dos partes principales: el tracto digestivo y las glándulas digestivas.
El cáncer de pulmón es un tumor maligno que se origina en la mucosa bronquial o las glándulas de los pulmones. Es uno de los tumores malignos con mayor morbilidad y mortalidad y mayor amenaza para la salud y la vida humana.
La diabetes es una enfermedad crónica con hiperglucemia como signo principal. Es causada principalmente por una disminución en la secreción de insulina causada por una disfunción de las células de los islotes pancreáticos, o porque el cuerpo es insensible a la acción de la insulina (es decir, resistencia a la insulina), o ambas cosas. la glucosa en la sangre es ineficaz para ser utilizada y almacenada.
El sistema digestivo es uno de los nueve sistemas principales del cuerpo humano y es el principal responsable de la ingesta, digestión, absorción y excreción de los alimentos. Consta de dos partes principales: el tracto digestivo y las glándulas digestivas.
Chapter 2 Data Representation and Operation
Data representation and operations
Number system and coding
Conversion between different base numbers
Convert decimal number to arbitrary base number
Division by base and remainder method (conversion of integer part)
Multiplication base rounding method (conversion of decimal part)
Think in conjunction with the numerical representation formulas of r-base numbers instead of memorizing them by rote.
Original code, complement code, inverse code, frame code
Original code representation
The sign bit of positive numbers is represented by 0, the sign bit of negative numbers is represented by 1, and the value bit remains unchanged.
complement representation
Two ways to find the complement of a negative number
Complement code method: When x ≤ 0, the sign bit is 1, the complement data bit is equal to the true value data bit, which is inverted bit by bit, and the last bit is added by one. This method can be proved by comparing the complement and complement formulas.
Scanning method: When x ≤ 0, the sign bit is 1, and the true value data bits are scanned sequentially from right to left. The first 1 from the right and the 0 on the right remain unchanged, and the remaining bits are negated.
one's complement notation
The sign bit is the same as the original code. When the true value is a positive number, the complement code is the same as the original code; when the true value is a negative number, the value bit of the complement code is the inversion of the true value bit.
frameshift notation
The frameshift and complement of a true value differ by only one sign bit.
fixed point number representation range
Arithmetic methods and arithmetic circuits
operator
Arithmetic Logic Unit (ALU)
ALUop is the operation control terminal, which is used to determine the processing functions performed by the ALU.
internal principles
All logic and arithmetic operation circuits run concurrently, and multiple operation results are sent to the input end of the multiplexer respectively, and AluOp selects one of the result outputs.
The basic structure of the operator
Single bus structure operator
In order to avoid data conflicts, only one data can be transmitted on the bus at the same time, but the ALU has two operands. For this reason, two buffer registers, LA and LB, need to be set at the ALU input end.
It takes 3 clock cycles to complete the operation of the two general-purpose register operands and write back the result
In the first clock cycle, the operand of the general register is sent to LA. Ri→ IB1, IB1 → LA signals need to be given. When the clock trigger arrives, the action of sending the operand to LA is completed.
The second clock cycle needs to complete the operation of sending another general register operand into LB, and the Ri→ IB1, IB1 → LB signals must be given.
The third clock cycle requires the operation selection control signal AluOp and the general register write-back control signal IB1 → Ri.
Dual bus structure operator
In order to prevent the output results of ALU from being directly sent to bus IB1 and causing data conflicts, a buffer register L is set up between the output of ALU and the IB1 bus to temporarily store the operation results.
It takes two clock cycles to complete the operation
The first clock cycle gives Ri→ IB1 and Ri→ IB2 signals to output the two register operands respectively. At the same time, the ALU operation control signal AluOp is given to control the data to perform correct operations. When the clock arrives, the operation results will be automatically written into the buffer. in register L.
The second clock cycle sends the data in L to the IB1 bus, giving L → IB1, IB1 → Ri signals, and with the cooperation of the clock signal, the data is written back to the general register.
Three-bus structure operator
The purpose of the bypass is to transfer data between general-purpose registers without going through the ALU.
The three-bus structure can simultaneously provide Ri→ IB1, Ri→ IB2, AluOp, IB3 → Ri signals, and complete the operation with the cooperation of clock cycles. The entire operation only requires one clock cycle.
The speed is the fastest among the three structures and does not require buffer registers, but its general register file needs to provide two read ports and one write port.
Fixed-point shift operations
arithmetic shift
The object of arithmetic shift is a signed number, and the sign bit remains unchanged during the shift process.
Shifting one bit to the left is equivalent to multiplying by 2 if no overflow occurs.
Shifting one position to the right is equivalent to dividing by 2 if the last digit that is rounded off due to the shift is not taken into account.
The sign bit of an arithmetic shift is always unchanged!
The overflow judgment condition of the arithmetic shift operation is: the original code arithmetic left shift shifts by 1, or the complement arithmetic left shift shifts the bit with the opposite sign.
logical shift
Logical shifts treat operands as unsigned numbers.
Shifting rules: When the logic is shifted to the left, the high bit is shifted and the low bit is added with 0; when the logic is shifted to the right, the low bit is shifted and the high bit is added with 0.
circular shift
Addition and subtraction of fixed-point numbers
Two's complement addition and subtraction operations
Add n inverters to the Y input end of the original adder to realize the function of inverting each bit, and then add a 2-to-1 multiplexer, controlled by a control terminal Sub, to select the original code Y to be input to the adder. Or invert each bit of Y and input it to the adder, and send the control terminal Sub to the adder as a low-bit carry at the same time.
Overflow detection Overflow is only possible when adding two numbers with the same sign.
(1) Detect based on whether the sign bit of the operand and the operation result are consistent.
It overflows when positive becomes negative and negative becomes positive.
(2) Detect according to whether the carry of the highest data bit and the sign bit during the operation are consistent.
When the carry of the highest data bit is inconsistent with the carry of the sign bit during the operation, the operation result overflows.
(3) Use double sign bits
The highest sign bit represents the actual sign.
C language operation overflow example
Fixed-point multiplication and division operations
Fixed-point multiplication
Original code one-bit multiplication
One's complement multiplication (Booth algorithm)
Fixed-point division operation
Original code division operation (remainder method is not restored)
Two's complement division operation (alternating addition and subtraction method)
Integer types and type conversion in C language
Conversion of signed and unsigned numbers
The bit values are kept unchanged, only the way the bits are interpreted changes.
Conversion between integers of different word lengths
When a large word length variable is forced to type into a small word length variable, the system directly truncates the redundant high bits and assigns the low bits directly.
When converting from short word length to long word length, not only the corresponding bit values must be equalized, but also the high-order part must be expanded.
If the original number is an unsigned integer, it is zero-extended and the high-order parts after the extension are filled with 0s.
Otherwise, sign extension is performed, and the extended high-order part is filled with the sign bit of the original number.
The essence is sign expansion of complement code
Data storage and arrangement
"Big endian" and "little endian" storage of data
The machine number of an int type variable i is 01 23 45 67H, its most significant byte MSB=01H, and its least significant byte LSB=67H.
Data is stored in a "boundary aligned" manner
border alignment
Borders not aligned
There is no boundary alignment problem for data of one byte length
Representation and operations of floating point numbers
Representation of floating point numbers
Normalization of floating point numbers
Left-hand rule: When the highest digit of the mantissa of the operation result is not a significant digit, that is, in the form of ±0.0…0x…x, a left-hand rule is required. In left-hand rule, every time the mantissa is shifted one position to the left, the exponent code is decreased by 1 (when the base is 2). The left rule may need to be performed multiple times.
Right-hand calculation: When the significant digit of the mantissa of the operation result goes before the decimal point, right-hand calculation is required. Shift the mantissa right by one position and add 1 to the exponent (when the base is 2). When you need to adjust the right direction, you only need to do it once.
IEEE754 standard
IEEE754 addition and subtraction of floating point numbers
(1) In the process of normalizing the order sum, the operation of the order code adopts the addition and subtraction operation rules of frame shifting.
"The small steps should be aligned with the big steps"
(2) The operation of the mantissa adopts the original code operation rules, and the hidden bits must participate in the mantissa operation.
(3) Hidden bits participate in the mantissa normalization judgment and mantissa normalization process.
If the mantissa is in the form of 1......., it is a standardized mantissa.
If the mantissa is in the form of 1×.…, it needs to be normalized to the right once, that is, the mantissa is shifted to the right by one position and the exponent code is increased by 1.
If the mantissa is in the form of 0..., you need to normalize it to the left, shift the mantissa to the left, and shift the mantissa to the left by 1 bit each time, and at the same time reduce the exponent by 1, until the mantissa is in the form of 1...
(4) Rounding processing, there are mainly the following rounding methods in IEEE754.
The last bit is always set to 1 method: as long as one of the bits lost due to the shift is 1, the lowest bit of the operation result is set to 1, regardless of whether the lowest bit was originally 0 or 1.
0-1 rounding method: When the highest digit of the missing digit is 1, add 1 to the last digit of the mantissa, similar to the rounding of decimal numbers.
Truncation method: directly intercept the required number of digits and discard all subsequent digits. This rounding process is the simplest.
(5) Overflow judgment.
The overflow of floating point operations can be judged by the overflow of the exponent code. For IEEE754 single-precision floating-point numbers, normalization overflow occurs when normalizing to the right causes the exponent to be all 1 (that is, 11111111, the true value is 128). Normalization underflow occurs when normalizing to the left causes the exponent to be all zeros.
For floating point operations, when the exponent overflows, it means that the operation result overflows.
Operations that may cause overflow
Right-hand and mantissa rounding. When rounding a very large mantissa, mantissa overflow may occur due to adding 1 to the last digit. In this case, you need to adjust the mantissa and order through the right-hand rule. Adding 1 to the right-hand order causes the order to increase, so it is necessary to determine whether an exponential overflow has occurred.
Left rule. When the left rule decreases the order by 1, the order decreases, so it is necessary to determine whether an exponential underflow has occurred. The judgment rule is similar to that of index overflow. If you turn left once, the exponent code is reduced by 1, and then it is judged whether the exponent code is all 0 to determine whether the exponent underflows.
Index overflow and index underflow
If a positive index exceeds the maximum allowed value (127 or 1023), index overflow occurs and an exception occurs.
If a negative exponent exceeds the minimum allowed value (-126 or -1022), an exponent underflow occurs, and the result is usually treated as machine zero.
Floating point type in C language
Forced type conversion between int, float and double
double→float
Overflow may occur when converting large numbers, and rounding may occur when converting high-precision numbers.
float/double→int
The decimal part will be rounded, and large numbers may overflow when converted.
float→double
Since the mantissa and exponent width of double type data are larger than that of float type, its representation range is larger and the precision is higher. The converted double type data is completely equal to the original float type data.
int→float
Both types are 32 bits, and the number of states they represent is the same. The data represented by the two on the number axis does not completely overlap.
The float type uses part of its state to represent larger integers and decimals. Some relatively large integers in the int type cannot be accurately represented by the float type.
The mantissa of a floating point number has a total of 24 bits including hidden bits. When the 24~31 bits of int data are non-0, it cannot be accurately converted into the mantissa of a 24-bit floating point number. At this time, precision overflow will occur and rounding processing is required.
int→double
The mantissa field of floating point numbers is 53 bits and can accurately represent all 32-bit integers.